S. Kim, K. J. Kuhn, T. Ghani, A. Murthy, M. Armstrong, R. Rios, A. Pethe and W.Rachmady, “Integration methods to fabricate internal spacers for nanowire devices”, US 9,484,447 B2

A. Cappellani, A. Pethe, T. Ghani and H. Gomez, “Methods for fabricating strained gateall-around semiconductor devices by fin oxidation using an undercut etch-stop layer”, US 9,484,272

A. J. Pethe, T. Ghani, M. Bohr, C. Webb, H. Gomez and A. Cappellani, “Gate Contact structure over active gate and method to fabricate the same”, US 9,461,143 B2

F. Greer, A. Joshi, K. Kashefi, A. S. Lee, A. Pethe and J. Watanabe, “Reduction of native oxides by annealing in reducing gas or plasma”, US 9,312,137

A. Cappellani, P. Pathi, B.E. Beattie and A.J. Pethe, “Three-dimensional germaniumbased devices formed on globally or locally isolated substrates”, US 9,041,106

J.Su, A. Bodke, A. Pethe and J. Watanabe, “Oxide removal by remote plasma treatment with fluorine and oxygen radicals”, US 8,945,414 B2

A. Cappellani, A.J. Pethe, T. Ghani and H. Gomez, “Strained gate-all-around semiconductor device formed on globally or locally isolated substrates”, US 8,735,869

A. Murthy, D. B. Aubertine, T. Ghani, A.J. Pethe, “Semiconductor Device having doped epitaxial region and its methods of fabrication”, US 8,598,003 B2

A. Joshi, S. Barstow, P. Besser, A. Bodke, G. Bouche, N. Fuchigami, Z. Hong, S. Koh, A.S. Lee, S. Majumdar, A. Pethe and M. Raymond, “Semiconductor Device Metal-insulator-Semiconductor contacts with interface layers and methods to form the same”, US 14/576,597 Application

S. Majumdar, A. Joshi, K. Kashefi, A.S. Lee, A. Pethe and B. Yang, “Metal-insulatorsemiconductor (MIS) contact with controlled defect density”, US 14/315,718 Application

B. Yang, A. Pethe, A. Lee, A. Joshi, A. Bodke, K. Kashefi and S. Majumdar, “Methods for depositing an aluminum oxide layer over germanium substrates in the fabrication of integrated circuits”, US 14/044,514 Application

B. Yang, A. Pethe, A. Lee, A. Joshi, A. Bodke, K. Kashefi and S. Majumdar, “Methods for removing a native oxide layer from germanium substrates in the fabrication of integrated circuits”, US 14/044,376 Application

A. Pethe, J. S. Sandford, C. J. Weigand and R. D. James, “Improved area scaling on trigate transistors”, US 2013/041020 Application