Publications - BITS Pilani

Prof. Pritesh Kumar Yadav

Visiting Assistant Professor,
Department of Electrical and Electronics Engineering

ASIC Design, Digital VLSI Design, RF Receiver Frontend Design, RF/Analog Circuit Design

Birla Institute of Technology & Science, Pilani
Hyderabad Campus
Jawahar Nagar, Kapra Mandal
Dist.-Medchal-500 078
Telangana, India

pritesh.yadav@hyderabad.bits-pilani.ac.in

+91 40 66303720

Pritesh Kumar Yadav, Prashant Kumar, Ankita Verma, Sunanda Ambulker, and Prasanna Kumar Misra. "A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology." In 2020 IEEE International Symposium on Smart Electronic Systems (iSES), pp. 227-231. IEEE, May 2020.
Pritesh Kumar Yadav and Prasanna Kumar Misra. "Power Aware Study of 32-bit 5-stage Pipeline RISC CPU using 180nm CMOS Technology." In 2017 14th IEEE India Council International Conference (INDICON), pp. 1-4. IEEE, Oct 2018.
Pritesh Kumar Yadav and Prasanna Kumar Misra. “A Double-Resistive Feedback Active Inductor based Receiver Frontend in 40 nm CMOS Process for 28-GHz Applications." In 2022 IEEE 19th India Council International Conference (INDICON), pp. 1-6. IEEE, 2022.
Pranjal Srivastva, Pritesh Kumar Yadav, and Prasanna Kumar Misra. "Design of 32 bit Asynchronous RISC CPU Using Micropipeline." In 2018 Conference on Information and Communication Technology (CICT), pp. 1-5. IEEE, May 2019.
Jai Shankar Kumar, Babli Kumari, Prashant Kumar, Ankita Verma, Pritesh Kumar Yadav, Sunanda Ambulker, Manish Goswami, and Prasanna Kumar Misra. "Design of Transceiver at 865–867 MHz Band using UMC 180 nm CMOS Technology." In 2020 24th International Symposium on VLSI Design and Test (VDAT), pp. 1-5. IEEE, Sept 2020.

Pritesh Kumar Yadav and Prasanna Kumar Misra. "Tunable bandpass filter using double resistive feedback floating active inductor for 5 GHz wireless LAN Applications." Analog Integrated Circuits and Signal Processing, 108(1), pp.205-213, 2021.
Pritesh Kumar Yadav, Ankita Verma, and Prasanna Kumar Misra. "A Proposed Technique to Improve the Performance of Receiver by Using Linear Gm-C Low-Pass Filter for mmwave Band Applications." Journal of Circuits, Systems and Computers Vol. 30, No. 16 (2021): 2150304 (16 pages).
Ankita Verma, Pritesh kumar Yadav, Manish Goswami and Prasanna Kumar Misra “A differential LNA Architecture with improved Figure of Merit using 40nm UMC CMOS Technology for mmWave band Receiver Applications”, Wireless Personal Communications, 124(1), pp.783-799, 2022.
Ankita Verma, Pritesh kumar Yadav, Sunanda Ambulker, Manish Goswami and Prasanna Kumar Misra "A 36.7 mW, 28 GHz receiver frontend using 40 nm RFCMOS technology with improved Figure of Merit." Analog Integrated Circuits and Signal Processing, 107(1), pp. 135-144, 2021