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Prof. Subhendu Kumar Sahoo

Head & Professor,
Department of Electrical and Electronics Engineering

VLSI architecture for Digital Signal Processing
Birla Institute of Technology & Science, Pilani
Hyderabad Campus
Jawahar Nagar, Kapra Mandal
Dist.-Medchal-500 078
Telangana, India

PH. D. THESIS SUPERVISED/SUPERVISING

 

Name of Student

Brief Title of  Thesis

Status

Srinivas Raddy

High performance VLSI architecture for Digital FIR filter Design

Completed 

Apurva Kumari

Reduction Of Computational Complexity And Hardware Implementation of Restoration Based Algorithm For Weather Degraded Images And Videos

Completed

Ganesh Kumar

Analysis and Design of FFT Processor Architecture for OFDM Applications

Completed  

M.K. Kaushik

Investigations on building Robust Cognitive Radio based Networks

Completed  (Co-supervisor)

Aditya Japa

(Student at IIIT NR)

Device and Circuit co-design for Energy Efficient IoT Applications with Enhanced Hardware Security

Completed

(Co-supervisor)

MRUNALI WAGH

Design and Development of IoT Driven Miniaturized Biosensor for Various Monitoring Applications

Continuing


Research Interest

  1. VLSI Arithmetic circuits for signal processing applications.
  2. Digital VLSI circuits for communication application.