Panelist For The Young Investigator Award As A Part Of The Isa Technovation Awards 2007
Guided ME students, for Cadence Design Contest 2017, winner masters categoty, title--,Design and Implementation of Differential Power Analysis Attack Immune Encryption Circuit Based on Simon Block Cipher for Next Generation RFID Cards
CERTIFICATE OF APPRECIATION from TEXAS INSTRUMENT for guiding student team for India Innovation Challenge Design Contest
Member of editorial review board of Scientific Journals International , IETE technical review, 2006 , 2007 , IEEE potentials, 2007
Certificate of appreciation from cadence --- CADENCE DESIGN CONTEST 2012---second position (runner up) guided a team of studens.
Received the grant Rs. 8.30 lacs for the project on “Development of silicon prototype of low power and low noise clock-less pipelined/multi stages data -converter based on 180/90nm technology for low power portable self-trigger able integrated circuit applications” under seed grant from BITS, Pilani. PI- Dr.Anu Gupta
Prof. Anu Gupta in chaired a session in International Journal of Information and Electronics Engineering (ICIEE 2017), February 22-24, 2017, Singapore
Prof. Anu Gupta in chaired a session in International Journal Conference on Advanced Electronic Systems (ICAES 2013), September 21-23, 2013