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Dr. Anu Gupta

Professor, Department of EEE, BITS Pilani, Pilani Campus

ASIC Design, HDL Synthesis and FPGA Architectures, Low Power Analog and Digital Circuits Design, Mixed Signal VLSI Design
Department of Electrical and Electronics Engineering, Birla Institute of Technology & Science, Pilani- 333031, Rajasthan. India.

ADMINISTRATIVE TASK

Head of Department, EEE

I was Head of department of Electrical & Electronics Engineering at BITS PILANI, Pilani Campus from 2012-2016

Nucleus Member Of  Division/Unit/Instiutute
  •  I am a member of Senate (highest decision making body at BITS PILANI)
  •  I was TECHNOLOGY BUSINESS INCUBATOR [now converter to Pilani Innovation & Entrepreneurship Development (PIED ) Society] for last 7 years. The work includes preparation of TBI documents, interacting with incubates to resolve their problems, managing the financial details / contract agreements of incubates  and coordinating with senior faculty members regarding TBI  operations
  •  I am also the Instructor in Charge of  TECHNOLOGY INNOVATION CENTRE   (TIC) projects which are given by external industries to be completed at BITS PILANI. This requires a lot of interaction with company personnel and students
Resource Person For Intensive Teaching Workshop/Subject Workshops
 I am involved as examining faculty   in ITW  (intensive teaching workshop)  
M E Student Mentoring
I am mentoring 2-3 students every semester for Research Practice/ Dissertation Course for past 7 years. I have also been coordinating project/research practice course activities every year in  I, II semester.
 Assisting Conduct of BITSAT (Invigilator/Co-Coordinator/Question Bank Preparation Etc.
  •    I prepared questions for ME (online-qualifying) exam
  •    I have been regularly involved in interview of students seeking admission to ME / PhD degree programme   both semesters.
 Committee Work
  • I was a  committee member of Research travel grant selection committee at BITS , Pilani
  • I was the member of departmental Research Committee
  • I attended the professional meeting with companies visiting BITS, pilani and explained VLSI lab facilities to them.
  • I am involved in development of new electives for B.E and M.E programmes in coordination with other campuses
  • I have been involved in development team of ME (EMBEDDED SYSTEMS) degree program and  WILP programs for working professionals
Organization of / Participation in Student/Staff Related Activities
  • I am an advisor for 3- 4  students for every year  since 2006. Task is  to guide them in case they feel ay difficulty at BITS PILANI,
  • Also a member of Academic Counseling cell (ACC) for  year 2010-11
  • I have also mentored students during APOGEE in their projects nearly every year.
  • Also, I was involved in paper evaluation, analog design contest evaluation during APOGEE .
  • I am a registration advisor during registration process in both the semesters
VLSI Design Lab Activities
  •  I am involved in  coordinating the activities at VLSI design lab (OLAB)
PhD qualifying Examination
  • I have been regularly involved in setting PhD Qualifying  and interview of students seeking admission to PhD degree programme  for past many years  in both semesters.
Registration Advisor
  • I have been registration advisor  for students during registration process in both semesters from past many  years
MISCELANEOUS

As Head of Department EEE,--- introduced new courses, presented for EEE department in campus review at Pilani/ Goa campus , and coordinated with faculty members of different disciplines.,  Registration Advisor, admission committee, participated in Convocation as HOD(EEE) and as professor, Member of DAC, DCA convenor, DRC convenor,, on campus  DLSC(EEE) chair person, off campus DLSC ( EEE)  Resource person- ITW, ACB, Library Committee, Been the member of Senate, Guided over 2500 project students, 50 FDTS and dissertation students, evaluation of WILP dissertations, Organizing Committee Member Of Intensive Teaching Workshop , Apogee Analog Design Contest -Judge And Faculty Convener , EEE department student association professor incharge, participated in PhD admissions, Phd Qualifying Examiner

Membership
  • Member Editorial Review board of Scientific Journals International , IETE technical review, 2006 , 2007 , IEEE potentials, 2007
  • IEEE Senior Member
  • Member, VLSI Society of India
  • Life Fellow, Institution of Engineers

 

Design Contests Participation
Cadence Design Contest 2017
 BITS Pilani Students win Cadence Design Contest 2017
 
 Cadence India recently concluded the 12th edition of the Cadence Design Contest which was aimed at fostering the spirit of inventiveness and realization of ideas among the engineering student community. This contest was open to students of all colleges in India that were enrolled as part of the Cadence India University Program.

 

92 teams participated from 38 unique institutes (36 from PG and 46 from UG). In the Final Round, 11 teams were qualified for live presentation in front of expert committee (6 from PG and 5 from UG). One winning team and one runner-up team were announced in each category.


BITS Pilani, Pilani Campus students emerged as winners of both the categories. Winning team members and guide will receive an Apple Watch, a memento and a certificate at CDNLive India 2017 on 7th September. The details of winners are:

 
 Master’s Category

                                                       Winner

Institute Name

BITS Pilani

Project Title

Design and Implementation of Differential Power Analysis Attack Immune Encryption Circuit Based on Simon Block Cipher for Next Generation RFID Cards

Team Members

Harjap Singh Saini and Abhinav Garg

Guide

Dr. Anu Gupta


Project Title:
      Design and Implementation of Differential Power Analysis Attack Immune Encryption

                             Circuit Based on Simon Block Cipher for Next Generation RFID Cards

Cadence Design Contest 2012

RUNNERS UP

 

Bachelor’s Category

Institute Name

BITS, Pilani

Project Title

Design  Of Ultra Low Power, Low Noise Implantable Neural Recording Amplifier For Brain Machine Interface  

Team

Keshav L, Praful Kumar Parakh, Nidhi Jaypalan & Rubin Kothari

Guide

Dr. Anu Gupta