Books Review:

• Microelectronic Devices and Circuits. Tata McGraw-Hill Publishing Company Limited, 2003

Journal/ Conference Reviewer  Panel member :

• VLSI Design & Test Symposium , 200,    PAPER TITLE: Synthesis Of Multiple-Valued Arithmetic Functions Using         Evolutionary  Process
• VLSI DESIGN & TEST SYMPOSIUM , 2005     PAPER TITLE: Implementation Of Vedic Mathematics Rules For Fast Multiplication Using Hdl
• IETE TECHNICAL REVIEW, 2006,    Paper Title: Energy Efficient Charge Recovery For Positive Feedback Adiabatic Logic
• IETE Technical Review, 2007,     Paper Title: Low Power 8-Bit Data Compression Hardware Using Adiabatic Logic
• IEEE Potentials, 2007,    Paper Title: Availability Based Tariff-An Introduction
• IEEE Potentials, 2008 Manuscript Id: Pot-2008-0068,   Paper Title: High Performance Development As Distributed Generation: A New Paradigm For Sustainable Electrical Energy
• International Joint Conferences On Computer, Information And Systems Sciences And Engineering (Cis2e 08)  2008,    Paper Title:  Engineering & Globalization: Effects On Engineering Practitioners.
• International Joint Conferences On Computer, Information And Systems Sciences And Engineering   (Cis2e 08)  2008,   Paper Title:  Simulating VHDL In Pspice Software 

Research Paper Review

• IET, Electronic Letters, Paper Title --' Power-efficient, high-PSNR current mode approximate full adder based on CNTFETs '.
• IET, Electronic Letters, Paper Title-- A Synchronization Buffer Reduction Technique for Energy and Area Efficient 4-phase Adiabatic Systems
• IET, Electronic Letters, Paper Title-- Novel Reversible CLA, Optimized RCA, and Parallel Adder/Subtractor Circuits
• IET, Electronic Letters, Paper Title— OTS Device based Integrate and Fire Neuron in Neural Network for Processing Biological Signals
• IET, Electronic Letters, Paper Title— Simple CMOS square wave generator with variable mode output
• IET, Electronic Letters, Paper Title— Asynchronous sampling of an active non-synchronised time-to-digital converter
• IET, Electronic Letters, Paper Title— Inverter-based sigma-delta modulator based on three-phase clock technique
• IET, Circuits, Devices & Systems, Paper Title— Computation and Analysis of Excitatory Synapse and Integrate & Fire Neuron: 180nm MOSFET and CNFET Technology
• IET, Circuits, Devices & Systems, Paper Title --A Novel Energy Efficient adder using CNTFET technology
• IET, Circuits, Devices & Systems, Paper Title --A novel method for designing ternary adder cell based on CNFETs
• IET, Circuits, Devices & Systems, Paper Title --A Fast Method for Process Reliability Analysis of CNFET-based Digital Integrated Circuits
• IET, Circuits, Devices & Systems, Paper Title --Carbon Nanotube FET-based Low-Delay and Low-Power Multidigit Adder Designs
• IET, Circuits, Devices & Systems, Paper Title --A new approach for designing compressors with a new Hardware-Friendly mathematical method for Multi-input XOR Gates
• Taylor & Franscis, International Journal of Electronics, Paper Title— Robust Low Power Transmission Gate (TG) based 9T SRAM cell with Isolated Read and Write Operation
• Taylor & Franscis, International Journal of Electronics, Paper Title-- Design of Improved Domino Logic for Low Leakage Wide Fan-In CNTFET Circuits
• Taylor & Franscis, International Journal of Electronics, Paper Title-- DPL-Based Novel CMOS 1-Trit Ternary Full-Adder
• Taylor & Franscis, International Journal of Electronics, Paper Title-- Implementing Three Novel MVL Current Mode Full Adders Using CNTFT
• Taylor & Franscis, International Journal of Electronics, Paper Title— DPL-Based Novel CMOS 1-Trit Ternary Full-Adder
• Taylor & Franscis, International Journal of Electronics, Paper Title— Power aware Logic for VLSI Applications
• Taylor & Franscis, International Journal of Electronics, Paper Title-- Gaussian Distribution Model for Gate to Channel Capacitance