Professor, Department of EEE, BITS Pilani, Pilani Campus
Project Director:
Prof Anu Gupta, Professor, Department of Electrical & Electronics Engineering, Birla Institute of Technology & Science- Pilani, Pilani Campus- Rajasthan-333031
Project Co-Directors:
1. Prof. Rajiv Gupta
2. Dr. Meetha V Shenoy
Design characterization-
Parameters |
Specifications for the Application |
Proposed ADC Achieved Results |
Resolution |
Medium |
8 bit |
Sampling Rate |
Low-Medium |
0-5 MS/s Variable |
External Clock |
No |
No |
Power Dissipation |
Low |
30 mW at 5 MS/s |
Area |
Low |
0.8544 mm2 |
SNDR |
High |
48 dB |
DNL |
Low |
0.9 LSB (max) |
INL |
Low |
1.9 LSB (max) |
ENOB |
Same as Resolution |
7.68 bits |
SFDR |
Very High |
54.68 dB |
Signal to Noise Floor |
Very High |
72 dB |
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